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Xilinx XC7Z045-L2FFG900I

Manufacturer Part Number : XC7Z045-L2FFG900I
Manufacturer : Xilinx
Description : Dual ARM® Cortex®-A9 IC SOC CORTEX-A9 KINTEX7 900BGA
Lead Free Status / RoHS Status : Lead free / RoHS Compliant
Datasheet : XC7Z045-L2FFG900I.PDF XC7Z045-L2FFG900I PDF
EDA / CAD Models : XC7Z045-L2FFG900I by SnapEDA
Quantity:
1 81 7340282 /datasheets/IntegratedCircuits/XC7Z045-L2FFG900I-3594629.pdf Xilinx-Inc/XC7Z045-L2FFG900I 7340282
Architecture:MCU, FPGA
Core Processor:Dual ARM? Cortex?-A9 MPCore? with CoreSight?
MCU RAM:256KB
Peripherals:DMA
Connectivity:CAN, EBI/EMI, Ethernet, I2C, MMC/SD/SDIO, SPI, UART/USART, USB OTG
Speed:800MHz
Primary Attributes:Kintex?-7 FPGA, 350K Logic Cells
Operating Temperature:-40~C ~ 100~C (TJ)
Package / Case:900-BBGA, FCBGA
Supplier Device Package:900-FCBGA (31x31)

XC7Z045-L2FFG900I Overview

The XC7Z045-L2FFG900I belongs to the Xilinx (AMD) Zynq®-7000 family. The Zynq®-7000 family is based on the Xilinx SoC architecture. These products integrate a feature-rich dual-core or single-core ARM® Cortex™-A9 based processing system (PS) and 28 nm Xilinx programmable logic (PL) in a single device. The ARM Cortex-A9 CPUs are the heart of the PS and also include on-chip memory, external memory interfaces, and a rich set of peripheral connectivity interfaces.

Xilinx(AMD) XC7Z045-L2FFG900I

As a professional Xilinx distributor, Nantian Electronics has a large number of XC7Z045-L2FFG900I in stock. We also provide XC7Z045-L2FFG900I parameters, XC7Z045-L2FFG900I Datasheet PDF and pin diagram instructions for download.

Feature

Front view of XC7Z045-L2FFG900I

  • 32 KB Level 1 4-way set-associative instruction and data caches (independent for each CPU)

  • 512 KB 8-way set-associative Level 2 cache,16-bit or 32-bit interfaces to DDR3, DDR3L, DDR2, or LPDDR2 memories

  • 1GB of address space using single rank of 8-, 16-, or 32-bit-wide memories

  • 8-Channel DMA Controller

  • GPIO with four 32-bit banks, of which up to 54 bits can be used with the PS I/O (one bank of 32b and one bank of 22b) and up to 64 bits (up to two banks of 32b) connected to the Programmable Logic

  • High-bandwidth connectivity within PS and between PS and PL

  • Two 10/100/1000 tri-speed Ethernet MAC peripherals with IEEE Std 802.3 and IEEE Std 1588 revision 2.0 support

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Technical Parameters of XC7Z045-L2FFG900I

Architecture:MCU, FPGA
Core Processor:Dual ARM? Cortex?-A9 MPCore? with CoreSight?
MCU RAM:256KB
Peripherals:DMA
Connectivity:CAN, EBI/EMI, Ethernet, I2C, MMC/SD/SDIO, SPI, UART/USART, USB OTG
Speed:800MHz
Primary Attributes:Kintex?-7 FPGA, 350K Logic Cells
Operating Temperature:-40~C ~ 100~C (TJ)
Package / Case:900-BBGA, FCBGA
Supplier Device Package:900-FCBGA (31x31)

Product Details

XC7Z045-L2FFG900I Overview

The XC7Z045-L2FFG900I belongs to the Xilinx (AMD) Zynq®-7000 family. The Zynq®-7000 family is based on the Xilinx SoC architecture. These products integrate a feature-rich dual-core or single-core ARM® Cortex™-A9 based processing system (PS) and 28 nm Xilinx programmable logic (PL) in a single device. The ARM Cortex-A9 CPUs are the heart of the PS and also include on-chip memory, external memory interfaces, and a rich set of peripheral connectivity interfaces.

Xilinx(AMD) XC7Z045-L2FFG900I

As a professional Xilinx distributor, Nantian Electronics has a large number of XC7Z045-L2FFG900I in stock. We also provide XC7Z045-L2FFG900I parameters, XC7Z045-L2FFG900I Datasheet PDF and pin diagram instructions for download.

Feature

Front view of XC7Z045-L2FFG900I

  • 32 KB Level 1 4-way set-associative instruction and data caches (independent for each CPU)

  • 512 KB 8-way set-associative Level 2 cache,16-bit or 32-bit interfaces to DDR3, DDR3L, DDR2, or LPDDR2 memories

  • 1GB of address space using single rank of 8-, 16-, or 32-bit-wide memories

  • 8-Channel DMA Controller

  • GPIO with four 32-bit banks, of which up to 54 bits can be used with the PS I/O (one bank of 32b and one bank of 22b) and up to 64 bits (up to two banks of 32b) connected to the Programmable Logic

  • High-bandwidth connectivity within PS and between PS and PL

  • Two 10/100/1000 tri-speed Ethernet MAC peripherals with IEEE Std 802.3 and IEEE Std 1588 revision 2.0 support

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