CD4017 Function Working Principle Internal Structure and Application

CD4017 Introduction

CD4017 is a decade counter/pulse distributor. CD4017 is a 5-bit Johnson counter with 10 decoding output terminals and CP, CR, INH input terminals. A Schmitt trigger on the clock input provides pulse shaping with unlimited rise and fall times for the input clock pulse. CD4017 provides 16-lead multilayer ceramic dual-in-line (D), fused-sealed ceramic dual-in-line (J), plastic dual-in-line (P) and ceramic chip carrier (C) 4 package forms.

CD4017 Working Conditions

• Power supply voltage range: 3V-15V

• Input voltage range: 0V-VDD

• Range of working temperature

• Type M: -55°C-125°C

• Class E: -40°C-85°C

CD4017 pin diagram and function

Figure 1: CD4017 IC pin layout details

• CO: carry pulse output

• CP: clock input

• CR: clear end

• INH: Inhibit terminal

• Q0~Q9: Counting pulse output terminals (1-7 and 9-11)

• VDD: positive power supply

• VSS: ground

How cd4017 works

cd4017 counter, provides fast operation, 2 input decoding strobe and glitch-free decoding output. An anti-lock strobe ensures correct counting sequence. The decoding output is generally low level, and only keeps high level in the corresponding clock cycle. The CO signal completes a carry every 10 clock input cycles, and is used as the lower-level pulsating clock of the multi-level counting chain.

CD4017 internal structure diagram

Figure 2: CD4017 internal logic circuit diagram

The schematic diagram of CD4017's internal logic circuit is shown in Figure 2. It is composed of two parts: a decimal counter circuit and a timing decoding circuit. Among them, the D flip-flops F1~F5 constitute the decimal Johnson counter, and the gate circuits 5~14 constitute the timing decoding circuit. The structure of the Johnson counter is relatively simple. It is essentially a serial shift register. Except that the third flip-flop acts on the D3 terminal of F3 through the combination logic circuit composed of gate circuits 15 and 16, the other stages connect the output end of the previous stage flip-flop to the input end of the subsequent stage flip-flop For D, the Q5 end of the last stage of the counter is connected to the D1 end of the first stage. This kind of counter has the characteristics of reliable coding, fast working speed, simple decoding, and only needs to be decoded by an AND gate with two inputs, and the decoding output has no transition pulse interference. Usually only the output terminal selected by decoding is high level, and the other output terminals are all low level. The Johnson counter status is shown in the table below.

Johnson Counter State Table

	Q1	Q2	Q3	Q4	Q5
0	0	0	0	0	0
1	1	0	0	0	0
2	1	1	0	0	0
3	1	1	1	0	0
4	1	1	1	1	0
5	1	1	1	1	1
6	0	1	1	1	1
7	0	0	1	1	1
8	0	0	0	1	1
9	0	0	0	0	1

After adding the zero-clearing pulse, Q1~Q5 are all "0", because the data input terminal D1 of Q1 is the inverse code output by Q5, therefore, after the first clock pulse is input, Q1 is "1", at this time, Q2 -Q5 all perform shift output in turn, the output of Q1 is moved to Q2, and the output of Q2 is moved to Q3... . If you continue to input pulses, then Q1 will be a new Q5, and Q2~Q5 will still be shifted and output in turn, so that you can get the state of Table 1~1 and the waveform of Figure 1~3

The Johnson counter composed of five-level counting units can have 32 combined states at its output, but only 10 counting states are required to form a decimal counter. Therefore, when the circuit is powered on, it is possible to enter 22 kinds of states that we do not need Pseudocode state

In order to make the circuit quickly enter the states listed in Table 1~1, two levels of combinational logic gates are added to the data input end of the third-level counting unit, so that Q2 is not directly connected to D3, and 03 is determined by the following relationship:

D3=Q2(Ql+Q3)

In this way, when the power is turned on, no matter which random combination appears in the counting unit, after at most 8 clock pulses are input, it will automatically enter the state listed in Table 1~1.

CD4017 has 3 input terminals: reset terminal R, when a high level or a positive pulse is applied to the R terminal, the counter is cleared, among all outputs, only Q0 corresponding to the "0" state outputs high level, and the rest output Both are low level: the clock input terminals CP and CE, where the CP terminal is used for rising edge counting, and the CE terminal is used for falling edge counting. The internal logic circuits of these two input terminals are shown in Figure 2. It can be seen from Figure 2 that there is an interlocking relationship between CP and CE, that is, when using CP to count, the CE terminal should be connected to a low level; when using CE to count, the CP terminal should be connected to a high level. Otherwise, an interlock is formed.

When a high level or positive pulse is added to the "R" terminal, each counting unit F1-F5 in the counter is set to zero, and the counter is in the "00000" state.

CD4017 has 10 decoding output terminals Q0~Q9, which still appear high level sequentially with the input of the clock pulse, as shown in Figure 3. In addition, for the convenience of cascading, a carry output terminal QC is also provided. Every time 10 clock pulses are input, a carry output pulse can be obtained, so QC can be used as the clock signal of the next counter.

It can be seen from the above analysis that CD4017 (its basic function is to count the number of input pulses at the "CP" terminal in decimal system, and distribute the pulses to the ten output terminals of Yo-Y9 according to the number of input pulses, After counting ten numbers, the counter resets to zero and outputs a carry pulse at the same time. As long as we master these basic functions, we can design various application circuits.

CD4017 Application Circuit

1. A colored lamp circuit made of a CD4017

The lantern circuit made with a CD4017 is shown in Figure 3.

Figure 3: A circuit diagram of colored lights composed of a CD4017

The order of CD4017 output high level is 3, 2, 4, 7, 10, 1, 5, 6, 9 pins respectively, so the high level of 3, 2, 4, 7, 10, 1 pin makes 6 strings of colored lights Light up in sequence to the right, and the high level of pins 5, 6, and 3 makes the 6 strings of colored lights radiate from the center to both sides. Various lighting modes can be combined according to your own needs. If you want to change the flashing speed of the colored lights, you can change the size of the capacitor C1.

2. The circuit diagram of colored lights composed of three CD4017

The cascade connection of CD4017 is shown in Figure 4.

Figure 4: The circuit diagram of colored lights composed of three CD4017

CD4017 cascaded can output 24 high levels sequentially, the same principle as above can be combined to produce a variety of different lighting modes, which can make 6 strings of lights flow to the right and then to the left to shine, the center spreads out to both sides and then to the left The center closes to emit light, 1, 3, 5, 2, 4, 6 strings emit light at intervals, etc.